FPGA computing systems: Background knowledge and introductory materials
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FPGA computing systems: Background knowledge and introductory materials at Coursera Overview
Duration | 46 hours |
Start from | Start Now |
Total fee | Free |
Mode of learning | Online |
Difficulty level | Beginner |
Official Website | Explore Free Course  |
Credential | Certificate |
FPGA computing systems: Background knowledge and introductory materials at Coursera Highlights
- Shareable Certificate Earn a Certificate upon completion
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- Beginner Level
- Approx. 46 hours to complete
- English Subtitles: French, Portuguese (European), Russian, English, Spanish
FPGA computing systems: Background knowledge and introductory materials at Coursera Course details
- This course is for anyone passionate in learning how a hardware component can be adapted at runtime to better respond to users/environment needs. This adaptation can be provided by the designers, or it can be an embedded characteristic of the system itself. These runtime adaptable systems will be implemented by using FPGA technologies.
- Within this course we are going to provide a basic understanding on how the FPGAs are working and of the rationale behind the choice of them to implement a desired system.
- This course aims to teach everyone the basics of FPGA-based reconfigurable computing systems. We cover the basics of how to decide whether or not to use an FPGA and, if this technology will be proven to be the right choice, how to program it.
- This is an introductory course meant to guide you through the FPGA world to make you more conscious on the reasons why you may be willing to work with them and in trying to provide you the sense of the work you have to do to be able to gain the advantages you are looking for by using these technologies.
- We rely on some extra readings to provide more information on the topic covered in this course.
- Please NOTE that most of the time, these documents are provided through the IEEE Xplore Digital Library, which means that, to access them, you have to have a valid IEEE subscriptions, either does by yourself or through your university/company.
- The course has no prerequisites and avoids all but the simplest mathematics and it presents technical topics by using analogizes to help also a student without a technical background to get at least a basic understanding on how an FPGA works.
- One of the main objectives of this course is to try to democratize the understanding and the access to FPGAs technologies. FPGAs are a terrific example of a powerful technologies that can be used in different domains. Being able to bring this technologies to domain experts and showing them how they can improve their research because of FPGAs, can be seen as the ultimate objective of this course. Once a student completes this course, they will be ready to take more advanced FPGA courses.
FPGA computing systems: Background knowledge and introductory materials at Coursera Curriculum
A Bird's Eye View on Adaptive Computing Systems
Course Introduction
Reconfiguration in Everyday Life
The Needs for Adaptation: an overview
FPGA and reconfiguration: a 1st definition
Runtime management
Programmable System-on-Chip
Programmable System-on-Multiple Chip
Self-Aware Adaptation in FPGA-based Systems [suggested readings]
Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores [suggested readings]
Reconfigurable computing: a survey of systems and software [suggested readings]
ReconOS: An Operating System Approach for Reconfigurable Computing [suggested readings]
R3TOS-Based Autonomous Fault-Tolerant Systems [suggested readings]
Reconfigurations
History of Reconfiguration
FPGA and reconfiguration
Programmable SoC Vs SoMCs
Runtime management
Reconfigurable Computing: a 1st definition
Reconfigurable Computing: HW vs SW
On how to improve the Reconfigurable computing performance via CAD improvements
FPGA-Based Reconfigurable Computing
System design space exploration and rationale behind partial reconfiguration
A platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization [suggested readings]
A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture [suggested readings]
Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs [suggested readings]
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms [suggested readings]
Reconfigurable Computing Module
Performance
Reconfigurable Computing and FPGAs
Getting Familiar with FPGAs
FPGA Basic Block: CLBs and IOBs
FPGA Basic Block: Interconnections
FPGA Configuration: an overview
More Details on How To Configure and FPGA: the bitstream files
Bitstream Composition
Configuration Registers
How to handle the complexity of an FPGA-based system
Note on the "Resources"
Physical design for FPGAs [suggested readings]
Multi-Million Gate FPGA Physical Design Challenges [suggested readings]
Getting familiar with FPGAs
FPGA configuration and Bitstream
4 inputs - 1 output OR LUT configuration example
From the LUT to the CLB configuration example
A simplified FPGA and its configuration settings
An Example on how to implement a circuit on a simplified FPGA
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - CLBs
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - SBs and routing
LUT and CLB
Physical design
An Introduction to Reconfigurations
A Common Vocabulary
The 5 W's
Reconfigurable Computing as an Exstension of HW/SW Codesing
A Classification of SoC Reconfigurations
A Classification of SoMC Reconfigurations
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign [suggested readings]
Performance of partial reconfiguration in FPGA systems: A survey and a cost model [suggested readings]
Functionalities and their implementations
Module Review
Scenarios where Partial Reconfiguration can be effective
How to use FPGA Reconfiguration to face area issues
How to deal with the Reconfiguration runtime overhead
Recurring modules to reuse them to reduce the Reconfiguration time
Partial Reconfiguration to reduce the Reconfiguration runtime overhead
Runtime management to explore alternative implementations
Bitstreams relocation
Bitstreams relocation and virtual homogeneity
Operating system runtime management of partially dynamically reconfigurable embedded systems [suggested readings]
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture [suggested readings]
A runtime relocation based workflow for self dynamic reconfigurable systems design [suggested readings]
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux [suggested readings]
Reconfigurable System
Partial reconfiguration
Design Flows
Xilnx Design Flows through years
Partial Reconfiguration Design Flows
Xilinx Difference Based Partial Reconfiguration
Xilinx Module Based Partial Reconfiguration
Xilinx Partial Reconfiguration (PR) Flow
Moudle Based vs Partial Reconfiguration Design Flows
Rationale behind DRESD and the work done by the Politecnico di Milano
From DRESD to CHANGE and ASAP, two new research initiatives from the Politecnico di Milano
CAOS: from embedded to heterogeneous distributed FPGA-based computing systems
Vivado Design Suite Tutorial, Partial Reconfiguration, UG947 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]
Vivado Design Suite User Guide, Partial Reconfiguration, UG909 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]
Dynamic Reconfigurability in Embedded System Design [suggested readings]
A design methodology for dynamic reconfiguration: the Caronte architecture [suggested readings]
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation [suggested readings]
Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project [suggested readings]
The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems [suggested readings]
Abstractions
Politecnico di Milano Partial Reconfiguration Research Initiatives
Design flows
Towards distributed FPGA-based systems
Virtualized Execution Runtime for FPGA Accelerators in the Cloud [suggested readings]
A cloud-scale acceleration architecture [suggested readings]
Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center [suggested readings]
Closing remarks and future directions
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