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Hardware modelling using Verilog 

  • Offered byNPTEL

Hardware modelling using Verilog
 at 
NPTEL 
Overview

Equipped with the knowledge and skills to model digital circuits using Verilog, write test benches to verify their functionality, simulate these circuits, and analyze the results

Duration

8 weeks

Mode of learning

Online

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Credential

Certificate

Hardware modelling using Verilog
 at 
NPTEL 
Highlights

  • Earn a certificate after completion of the course
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Hardware modelling using Verilog
 at 
NPTEL 
Course details

Skills you will learn
Who should do this course?
  • Computer Science and Engineering
  • Electronics and Communication Engineering
  • Electrical Engineering
More about this course
  • This course will introduce the participants to the Verilog hardware description language
  • It will help them to learn various digital circuit modeling issues using Verilog, writing test benches, and some case studies

Hardware modelling using Verilog
 at 
NPTEL 
Curriculum

Week 1: Introduction to digital circuit design flow

Week 2: Verilog variables, operators and language constructs

Week 3: Modeling combinational circuits using Verilog

Week 4: Modeling sequential circuits using Verilog

Week 5: Verilog test benches and design simulation

Week 6: Behavioral versus structural design modeling

Week 7: Miscellaneous modeling issues: pipelining, memory, etc.

Week 8: Processor design using Verilog

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Hardware modelling using Verilog
 at 
NPTEL 
Faculty details

Prof. Indranil Sengupta
Indranil Sengupta has obtained his B.Tech., M.Tech. and Ph.D. degrees in Computer Science and Engineering from the University of Calcutta He joined the Indian Institute of Technology, Kharagpur, as a faculty member in 1988, in the Department of Computer Science and Engineering, where he is presently a full Professor

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Hardware modelling using Verilog
 at 
NPTEL 

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