SystemVerilog for Verification Part 1: Fundamentals 

Course Overview

Learning Path for Course

Agenda

How to use EDA

How to use Xilinx Vivado Design Suite

Agenda

Type of signals in TB

Format of Initial Block in Testbench

Usage of Initial Block

Executing Code

Format of always Block

Usage of always Block

Aligning edges of the generated clock and reference clock

Understanding `timescale directive

Demonstration

Understanding parameters for generating Clock

Demonstration Part 1

Demonstration Part 2

Summary

Agenda

Datatypes P1

Datatypes P2

Datatypes P3

Datatypes P4

Demonstration of Datatypes P1

Demonstration of Datatypes P2

Demonstration of Datatypes P3

Demonstration of Datatypes P4

Demonstration of Datatypes P5

Demonstration of Datatypes P6

Demonstration of Datatypes P7

Understanding usage of array

Using array P1

Using array P2

Using array P3

Array Initialization Strategies

Demonstration

Loops for repetitive array operation P1

Loops for repetitive array operation P2

Loops for repetitive array operation P3

Array Operation P1 : COPY

Array Operation P1 : COMPARE

Dynamic Array P1

Dynamic Array P2

Dynamic Array P3

Queue P1

Queue P2

Usage of Fixed Size array

Usage of Queue

Agenda

Understanding Verification Plan P1

Understanding Verification Plan P2

Directed Test Vs Constraint Random Test P1

Directed Test Vs Constraint Random Test P2

Layered Architecture P1

Layered Architecture P2

Layered Architecture P3

Layered Architecture P4

Summary : Layered Architecture

Individual Components of TB

Summary

Agenda

Fundamentals of Class P1

Fundamentals of Class P2

Fundamentals of Class P3

Ways to add Method to Class

Using Function

Using Task

Understanding Pass by Value

Understanding Pass by Reference

Demonstration of Pass by Value

Demonstration of Pass by Reference

Summary

Using Array in Function

User defined Constructor

Multiple arguments to Constructor P1

Multiple arguments to Constructor P2

Multiple arguments to Constructor P3

Using task in Class

Using Class in Class

Scope of Data member

Copying Object

Strategies to copy Object

Custom Method

Understanding Shallow Copy

Shallow Copy demonstration

Understanding Deep Copy

Deep Copy demonstration

Summary

Extending Class properties by Inheritance

Polymorphism

Understanding Usage of Super Keyword

Agenda

Interprocess Communication Mechanism

IPC

Events

@ VS Wait

Executing Mulitple Process

Multiple Process with Multiple Initial block P1

Multiple Process with Multiple Initial block P2

Multiple Process with FORK JOIN P1

Multiple Process with FORK JOIN P2

Demonstration of FORK_JOIN

Understanding FORK JOIN_ANY

Understanding FORK JOIN_NONE

Usage of FORK JOIN in Testbench

Understanding Semaphore

Understanding Mailbox P1

Understanding Mailbox P2

Specifying Mailbox with Custom Constructor

Sending Transaction data with Mailbox P1

Sending Transaction data with Mailbox P2

Understanding Parameterized Mailbox P1

Understanding Parameterized Mailbox P2

Understanding Parameterized Mailbox P3

Using Parameterized Mailbox

Agenda

Interface

Adding Interface to Simple RTL P1

Adding Interface to Simple RTL P2

Adding Interface to Simple RTL P3

Using blocking operator for Interface Variables

Using Non-blocking Operator for Interface Variables

Why we prefer LOGIC over WIRE and REG in Interface

Adding Driver Code to Interface P1

Adding Driver Code to Interface P2

Understanding MODPORT

Adding Generator P1

Adding Generator P2

Adding Generator P3

Important Rules

Adding Generator P4

Adding Generator P5

Injecting Error P1

Injecting Error P2

Injecting Error P3

Adding Monitor and Scoreboard P1

Adding Monitor and Scoreboard P2

Adding Monitor and Scoreboard P3

Tweaking Monitor and Scoreboard Code

Adding Simple Scoreboard Model