Armv8-M Architecture Fundamentals 

Course Introduction

A Brief History of M-Profile Architecture

Armv8-M Profile Overview - Part 1

Armv8-M Profile Overview - Part 2

Data Types

Core Registers: Armv8-M Mainline Registers

Core Registers: Stack Pointer, Link Register and Program Counter

Special-purpose registers part 1

Special-purpose registers part 2

Modes, Privilege and Stacks

Exceptions

Instruction Set Overview - Part 1

Instruction Set Overview - Part 2

Instruction Set Examples

Programming Standards

Programming Standards: CMSIS - Part 1

Programming Standards: CMSIS - Part 2

Programmers' Model Resources List

Challenge: Architecture Rules

Challenge: Programmers' Model Challenge: M-profile Architecture Implementations

Challenge: Create a basic Cortex-M application with CMSIS

Challenge: Familiarize yourself with CMSIS

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Programmers' Model

Introduction to Assembly Programming - Part 1

Introduction to Assembly Programming - Part 2

Introduction to Assembly Programming - Part 3

Introduction to Assembly Programming Quiz

Data Processing Instructions - Part 1

Data Processing Instructions - Part 2

Shift and Rotate Operations, Flexible Second Operand

Loading Constants into Registers

Multiply, Divide, and Bit Manipulation Instructions

Data Processing Instructions Quiz

Load/Store Instructions - Part 1

Load/Store Instructions - Part 2

Load/Store Instructions - Part 3

Load/Store Instructions Quiz

Flow Control Instructions - Part 1

Flow Control Instructions - Part 2

Flow Control Instructions Quiz

Miscellaneous Instructions - Part 1

Miscellaneous Instructions - Part 2

Miscellaneous Instructions Quiz

Arm Custom Instructions - Part 1

Arm Custom Instructions - Part 2

Assembly programming challenge

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Assembly Programming

Memory Address Space - Part 1

Memory Address Space - Part 2

Memory Types

Normal Memory - Part 1

Normal Memory - Part 2

Device Memory - Part 1

Device Memory - Part 2

Address Map

Endianness

Barriers

Barriers Examples

Armv8-M Mainline Memory Model Reference Material

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Memory Model

Memory Protection Introduction

Memory Protection Unit (MPU)

Memory Regions

MPU Registers - Part 1

MPU Registers - Part 2

MPU Configuration and Programming

Demo

Memory Management Fault Handling

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Memory Protection

Introduction to Exception Handling - Part 1

Introduction to Exception Handling - Part 2

Exception Types

Processor Mode Usage

External Interrupts & Pre-emption

Exception Handling Example

Exception Model & Properties

Vector Table for Armv8-M Mainline

Reset & Exception Behavior

Exception Priorities

Exception States

Exception Entry Behavior - Part 1

Exception Entry Behavior - Part 2

Stacking on Exception Entry - Part 1

Stacking on Exception Entry - Part 2

Exception Return Behavior

NMI Exception Entry and Return Examples

Nesting, Tail Chaining and Late-arriving Examples

Execution Priority & Priority Boosting

New Armv8-M Mainline Priority Grouping

Interrupt Control and Status Bits

Interrupt Sensitivity

Pulse-sensitive Interrupts

Level-sensitive Interrupts & Pending the Interrupt Again

CMSIS-Core: Vector Table

Writing Interrupt Handlers

Interrupt Management

Internal Exceptions - Part 1

Internal Exceptions - Part 2

Priority Escalation & Internal Interrupt Registers

Fault Exceptions

Fault Escalation & Fault Handling

The Lockup State

Synchronous and Asynchronous Exceptions

References

Congratulations

Armv8-M Mainline Exception Handling Reference Material

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Exception Handling