System Design Through VERILOG

Offered bySwayam

System Design Through VERILOG
at
Swayam
Overview

Duration	8 weeks
Total fee	Free
Mode of learning	Online
Schedule type	Self paced
Official Website	Explore Free Course
Credential	Certificate

System Design Through VERILOG
at
Swayam
Highlights

This is an AICTE approved FDP course

System Design Through VERILOG
at
Swayam
Course details

Who should do this course?

Undergraduate, post graduate students, faculty and industry people

More about this course

Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool.
A comprehensive resource on Verilog HDL for beginners and experts large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL)
The course is free to enroll and learn from. But if student want a certificate, they have to register and write the proctored exam conducted by us in person at any of the designated exam centres.
The exam is optional for a fee of Rs 1000/-

System Design Through VERILOG
at
Swayam
Curriculum

Week-1:Introduction to Verilog

Week-2:Gate level modelling

Week-3:Behavioral modelling I

Week-4:Behavioral modelling II

Week-5:Data flow modelling

Week-6:Switch level modelling

Week-7:Synthesis of combinational logic using verilog

Week-8:Synthesis of sequential logic using verilog

System Design Through VERILOG
at
Swayam
Faculty details

Prof. Shaik Rafi Ahamed

professor with more than 20 years teaching experienceMicroprocessors nearly 10 times for undergraduate students at IIT Guwahati and other institutions.