IIT Kanpur, Silizium Circuits jointly bag MeitY’s Grant-in-Aid project for Chips to Startup (C2S) program

The INR 5 crore project, Radio Frequency (RF) Transceiver System on Chip (SoC) with integrated RISC V core for Sub-GHz Applications, will be done in collaboration with Semiconductor IP company, Silizium Circuits Private Limited. The SoC will drive innovations in the IoT and indoor applications and its revenues are forecast to be around $ 1.3 trillion in 2030.

The Indian Institute of Technology (IIT) Kanpur jointly with Silizium Circuits Private Limited has bagged an INR 5 crore Grant-in-Aid project from the Ministry of Electronics and Information Technology (MeitY)’s Chips to Startup (C2S) program for its ground-breaking project, "Radio-frequency (RF) Transceiver SoC (System on Chip) with integrated RISC V core for Sub-GHz Applications". 

Prof Abhay Karandikar, Director of IIT Kanpur said, “IIT Kanpur has always been fostering innovation, promoting entrepreneurship, and driving technology commercialization and the Chips to Startup (C2S) project is part of this ongoing drive. The project, that aims at the formulation of an SoC supporting all the prominent standards in sub GHz, will drive innovations in the IoT and indoor applications. The development has tremendous market size and will put India in a stronger position with respect to a complex SoC research and development.”

The project duration is 3 years and IIT Kanpur as the nodal agency will be responsible for the development of significant mixed-signal IPs and Silizium Circuits will design the RF Front End and System-On-Chip (SoC) along with commercialization. 

Mr Rijin John, Co-founder and CEO of Silizium Circuits said “Semiconductor IPs (Intellectual Property) will be the brain of all hardware devices. Such an SoC supporting all prominent standards in sub GHz will drive innovations in the IoT and indoor applications whose revenues are forecast to be around $1.3 trillion by 2030. In addition to the final SoC, the IPs such as ADCs (Analog to Digital Convertors), PLL (Phase Locked Loops) and RF front end will also be developed which can target another $488 billion global market. All the low-power applications worldwide in future will require an ultra-low power receiver since it has to be alert to an incoming signal at all times.” 

IIT Kanpur and Silizium Circuits consider this project a pivotal point in India’s Semiconductor ambitions. Although Indian engineers contribute significantly to Microelectronics, most of the activities were limited to service sectors. The ecosystem has undergone significant changes with many startups in this field with the support of MEITY R&D grants and the DLI scheme.

The SoC in development will have an RF (radio-frequency) front end capable of transmitting in sub-1GHz UHF frequencies and will form the backbone of most of the long, short-range, wide, and narrowband communications.

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