Hindusthan Institute of Technology
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M.E. in VLSI Design 

  • A NAAC accredited
  • Private Institute
  • Estd. 2007

M.E. in VLSI Design
 at 
HIT 
Overview

Duration

2 years

Course Level

PG Degree

Mode of Course

Full Time

Total Tuition Fees

50,000

Official Website

Go to Website External Link Icon

Seat breakup

24

Type of University

Private

M.E. in VLSI Design
 at 
HIT 
Fees

Fee componentsAmount (2 years)
50,000
50,000
Info Icon

These are based on information available on various sources. Latest values may differ.

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M.E. in VLSI Design
 at 
HIT 
Highlights

  • The department has secured 11 university ranks and One Gold medal from the year of establishment
  • The department has established two Centre of Excellence in the field of Embedded Systems in association with TEXAS and PLC and SCADA in association with Siemens powered by GENN Automation
Want to know more about HIT Scholarship details?
Read about Scholarship

M.E. in VLSI Design
 at 
HIT 
Placements

ParticularsStatistics (2023)
Median SalaryINR 4.80 Lakh
% Batch placed92
Lock IconTop Recruiters for HIT
Amazon
CapGemini
Cognizant
HCL
HP
Infosys
Sanmar
Sutherland
TCS
Tech Mahindra
View placement details

M.E. in VLSI Design
 at 
HIT 
Entry Requirements

General
SC
ST
GraduationUp Arrow Icon
  • 50%
CEETAUp Arrow Icon
  • N/A
GATEUp Arrow Icon
  • N/A
Other eligibility criteriaUp Arrow Icon

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M.E. in VLSI Design
 at 
HIT 

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